When you look under the hood of generative AI processing, the system design challenges are many. Learn how efficiency, power consumption, and memory issues all come into play. In less than a year, generative AI saw global fame and use through OpenAI’s ChatGPT, a popular algorithm based on transformers. Transformer-based algorithms can learn complex interactions … Read more

Judged by the presence of artificial intelligence (AI) and machine learning (ML) technologies at 2023 Design Automation Conference (DAC), the premiere event for semiconductor designers, computing hardware for accelerating AI/ML software workloads is finally receiving due attention. According to PitchBook Data, in the first six months of 2023, more than 100 startups designing novel AI/ML … Read more

Mass adoption of generative AI hinges on improving processing efficiency and lowering total cost of ownership. Similar to the internet and the invention of its World Wide Web application, generative AI has seized the public’s imagination. ChatGPT, the most popular AI chatbot launched a mere eight months ago, caught the world by surprise, reported to … Read more

The next evolution in autonomous driving is to fuse sensor data in a 3D representation to increase the accuracy of understanding the environment and of tracking the movement of dynamic objects.

In general, the largest system-on-chip (SoC) designs in industries such as automotive, artificial intelligence/machine learning (AI/ML), and graphics/computing/storage share complexity and size, measured in billions of transistors.

Jean-Marie Brunet, Vice President and General Manager of the Siemens Hardware-Assisted Verification business unit finds himself and his group in a unique situation when it comes to the topic of chiplets.

Designing a 5G system brings new challenges. Unlike all four previous standards, the 5G standard addresses multiple requirements coming from growth in mobile users, IoT proliferation, and autonomous driving vehicle development.

Vsora has just raised $4.2 million in a pre-Series B round of financing to accelerate the development of its Tyr chip family.

Bill Neifert invited me to join him on Zoom recently to talk about his move to Corellium, a company known within the DevSecOps (development, security, operations) market.

Editor’s Note: Jean-Marie Brunet, Vice President and General Manager of hardware-assisted verification at Siemens, recently addressed the rapid growth of a specialized area in the chip design and verification space called hardware-assisted verification.