Bill Neifert invited me to join him on Zoom recently to talk about his move to Corellium, a company known within the DevSecOps (development, security, operations) market.
Editor’s Note: Jean-Marie Brunet, Vice President and General Manager of hardware-assisted verification at Siemens, recently addressed the rapid growth of a specialized area in the chip design and verification space called hardware-assisted verification.
Lauro Rizzatti offers Semiwiki readers a two-part series on why three kinds of hardware-assisted verification engines are now a must have for semiconductor designs continues today. His interview below with Juergen Jaeger, Prototyping Product Strategy Director in the Scalable Verification Solution division at Siemens EDA, addresses why different hardware platforms should be used in a … Read more
The September 2022 edition of EE Times Europe Magazine discusses innovations in automotive connectivity, electrification, and autonomous driving. It also analyzes trends and developments in neuromorphic, quantum, and photonics industries. Welcome to the September 2022 Edition of EE Times Europe Magazine! Two megatrends, autonomy and electrification, are revamping corporate strategies and changing the face of … Read more
Hardware-assisted verification (HAV) solutions are the must-have verification tools today as complexity, functionality, and performance requirements grow. They are also mandatory to ensure that design power consumption meets the power budget allocated. This need was obvious at the 2022 Design Automation Conference (DAC), as chip design verification engineers relayed tales of challenges solved by employing … Read more
In a two-part series, Lauro Rizzatti examines why three kinds of hardware-assisted verification engines are a must have for today’s semiconductor designs. To do so, he interviewed Siemens EDA’s Vijay Chobisa and Juergen Jaeger to learn more about the Veloce hardware-assisted verification systems. What follows is part one, a condensed version of his discussion with … Read more
The automotive industry is delivering the first implementations of advanced driver-assistance systems (ADAS) for Level 2 (foot off the gas or break) and Level 3 (hands off the wheel) vehicles. Though it’s struggling to develop an autonomous driving (AD) system from L4 (eyes off the road) to L5 (completely self-driving and autonomous) vehicles. The challenge … Read more
The Design Automation Conference, as always, is a good barometer on the state of EDA and my area of interest, verification. The recent DAC offered plenty of opportunities to check on trends and the status quo. Remarkably, exhibitors and attendees were upbeat about the chip design landscape despite concerns about supply chain shortages and the … Read more
https://www.gsaglobal.org/forums/the-challenges-to-achieve-level-4-level-5-autonom Jan PatnzarVice President of Sales and MarketingVSORA Lauro RizzattiConsultant The path to achieve fully autonomous driving (AD) progresses through five levels of increasing automation, as codified by the Society of Automobile Engineers (SAE) in 2014 under Standard J3016. It starts with L1 or basic driver assistance, and moves to L2, which means feet off … Read more
By Jean-Marie Brunet, and Dr. Lauro Rizzatti Today, system-on-chip (SoC) devices permeate our world and propel numerous industries. They are integral for the internet of things (IoT), to power up complex 5G/6G wireless applications, sit at the core of artificial intelligence/machine learning (AI/ML) algorithmic processors, drive powerful data center computers and storage devices, and are … Read more