2017

Members of a panel on hardware emulation at DVCon India discuss emulation’s role in SoC verification in front of an enthusiastic audience.

The fourth installment of DVCon India took place in Bangalore, September 14-15.

How emulation was used to debug out-of-spec power on a multicore arm design using the AXI bus.

Mentor’s Charley Selvidge has been thinking that the operating system of a hardware emulator is a natural evolution of the way software systems are built for emulators.

Lauro Rizzatti, Nasr Ullah (Samsung), Bruce Cheng (Starblaze), and Robert Kaye (ARM) discuss emulation for data storage chips, system IP, and embedded software.

A lively and open discussion explored tools and methodologies to accelerate embedded software development.

Techniques previously unavailable during ICE or testbench acceleration can now greatly speed emulation debug in those modes.

In this column, we review the state-of-the-art in solid state drives (SSDs) and propose a methodology for the verification and validation of the SSD controller.

Design in any discipline – electronics, mechanical, aerospace, etc. – begins with a specification that captures what the end product should do and essentially drives the entire development cycle.