Articles Authored by Lauro Rizzatti
-
Hardware Emulation Plus FPGA Prototyping: A Perfect Fit for Today’s SoC Verification
- January 27, 2021
- Posted by: Lauro Rizzatti
- Category: 2021
No CommentsA quick glance in today’s design verification toolbox reveals a variety of point tools supporting the latest system-on-chip (SoC) design development. Combined and reinforced by effective verification methodologies, these tools trace even the most hard-to-find bug, whether in software or in the target hardware.
-
Emulation-Centric Power Analysis of SoC Designs
- January 6, 2021
- Posted by: Lauro Rizzatti
- Category: 2021
Due to the switch from planar CMOS to FinFET technology, accurate pre-silicon power estimation is more important than ever for system-on-chip designs.
-
VSORA Pushes the PetaFLOPS for Autonomous Driving
- December 1, 2020
- Posted by: Lauro Rizzatti
- Category: 2020
Autonomous driving is a wildly challenging problem. Of all the headline-grabbing technologies in development today, replacing the human driver in a car probably takes the most computing power, although you wouldn’t guess that from the obvious lack of computing power demonstrated by many of our fellow human drivers on the road.
-
Three trends in emulation for 2021: Lauro Rizzatti
- November 9, 2020
- Posted by: Lauro Rizzatti
- Category: 2020
I first met up with Lauro Rizzatti of EVE, back in 2010, along with Montu Makadia (now, with Mentor). Back then, emulation was strong, (and, remains). EVE had launched the Zebu Server, a scalable emulation system handling 1 billion ASIC gates. This was much before EVE was acquired by Synopsys in October 2012.
-
Hardware-Assisted Verification Overtakes HDL Simulation
- September 4, 2020
- Posted by: Lauro Rizzatti
- Category: 2020
Over the past two years, a remarkable, though virtually unnoticed financial event occurred in the electronic design automation (EDA) space: revenue from hardware-assisted verification tools, basically hardware emulation and FPGA-based prototyping, surpassed those from hardware-design-language (HDL) or register-transfer-language (RTL) simulation.
-
Design and verify 5G systems, part 2
- August 28, 2020
- Posted by: Lauro Rizzatti
- Category: 2020
Designing 5G systems is a daunting task because the technology required to support their powerful capabilities makes them much more complex than their predecessors. This is further aggravated by the need for backwards compatibility/interoperability with equipment based on earlier 4G, 3G, and 2G standards.
-
5G Rollout Includes Challenges to Supply Chain, WFH Value
- August 13, 2020
- Posted by: Lauro Rizzatti
- Category: 2020
The growing work-from-home movement amid the coronavirus and its likely continuing challenges has created the need for additional broadband capacity in more places. Mobile telco and other service providers are rallying around 5G wireless as the most promising solution for reliably faster Internet connectivity.
-
Combining AI and Advanced Signal Processing on the Same Device
- August 4, 2020
- Posted by: Lauro Rizzatti
- Category: 2020
A lot has been written and even more spoken about artificial intelligence (AI) and its uses. Case in point, the use of AI to make autonomous vehicles (AV) a reality. But, surprisingly, not much is discussed on pre-processing the inputs feeding AI algorithms.
-
Design and verify 5G systems, part 1
- July 28, 2020
- Posted by: Lauro Rizzatti
- Category: 2020
Starting in the 1980s, the mobile industry has been upgrading the wireless technology at the rate of one new standard every decade. The first-generation (1G) cell phones launched in the ’80s, although they were not referred to as 1G at the time, were based on an analog technology that supported only voice communication with poor quality.
-
Challenges to Replacing Hard-Disk Drives
- July 7, 2020
- Posted by: Lauro Rizzatti
- Category: 2020
Computational storage devices are the new must-have peripherals for intensive storage applications.
If you are interested in more information regarding our marketing services, please contact us.