Articles Authored by Lauro Rizzatti

Part 2 of this two-part series on designing and using a modern hardware emulation platform highlights how to become an expert in using a modern hardware emulator vis-à-vis a hardware-description-language (HDL) simulator.

This first part of a two-part series authored by two leading experts in the field of hardware emulation explores how to build a platform that meets today’s needs.

What’s more complex than a system? Well, multiple systems connected together seems like a logical next step. With the combination of technology node reduction and new fields of application, we are starting to see that the systems on chip (SoCs) of yesterday are being combined into the systems of today.

It is reasonable to predict that hardware-assisted verification revenue will break through $600 million by the end of 2019.

There is no doubt that computers have changed our lives forever. Still, as much as computers outperform humans at complex tasks such as solving complex mathematical equations in almost zero time, they may underperform when solving what humans can do easily — image identification, for instance.

Thomas Delaye, director of technical marketing in the Emulation Division at Mentor, a Siemens Business, recently studied how data could be used more effectively in chip design verification tools, such as hardware emulation.

Hardware emulation is a strategically essential ingredient of a verification flow used in a broad range of applications. It’s also an expensive line item in a yearly budget because of a variety of factors including acquisition cost and expenses to keep it operational, usable, safe and in good working condition.

When you want to improve or change a dish, the expert explained, you start with a basic, well-known recipe, and proceed to make small changes.

When it comes to using AI, look for problems that have rules. If there are rules that enable people to solve the problem, that helps a lot.

The problem with verifying today’s designs is that we have to deal with systems that are inherently unverifiable.