Can AI Help Manage the Data Needed for SoC Verification?

EEWeb Thomas Delaye, director of technical marketing in the Emulation Division at Mentor, a Siemens Business, recently studied how data could be used more effectively in chip design verification tools, such as hardware emulation. A big challenge, he discovered, because hardware emulation has a data problem, notably the large amount it generates. What follows is … Read more

Budgeting for Hardware Emulation Platforms

GSA Posted Tuesday, November 12, 2019 By Lauro Rizzatti, Verification Expert Hardware emulation is a strategically essential ingredient of a verification flow used in a broad range of applications. It’s also an expensive line item in a yearly budget because of a variety of factors including acquisition cost and expenses to keep it operational, usable, … Read more

Designing Neural Networks Is Like Cooking

EEWeb Posted Monday, September 30, 2019 By Lauro Rizzatti, Verification Expert When you want to improve or change a dish, the expert explained, you start with a basic, well-known recipe, and proceed to make small changes. For example, you might modify the ratios of ingredients or replace some ingredients with others that you are familiar … Read more

Attendees Query Experts on Verification Challenges and Artificial Intelligence

The problem with verifying today’s designs is that we have to deal with systems that are inherently unverifiable EEWeb By Lauro Rizzatti (Contributed Content) | Thursday, June 27, 2019 Jean-Marie Brunet, senior director of marketing at Mentor, a Siemens Business, served as moderator for a well-attended and lively DVCon U.S. panel discussion on the hot … Read more

Delivering Design/Verification Tools to Create AI Chips

It just makes sense that we will find a lot of applications where we can use the power of AI to improve our processes and build chips faster EEWeb By Lauro Rizzatti (Contributed Content) | Thursday, June 20, 2019 Jean-Marie Brunet, senior director of Marketing at Mentor, a Siemens Business, served as moderator for a … Read more

How emulation’s virtual mode boosts productivity

Source: Part One: Tech Design Forum, Part Two: Tech Design Forum By Lauro Rizzatti and Gabriele Pulini  | May 01, 2019 Part One Hardware emulation can be deployed in two modes. In-circuit-emulation (ICE): This consists of testing the design-under-test (DUT) with real traffic in a physical environment. Virtual mode: The DUT is here verified via a test … Read more

Verification Trends from DVCon

If DVCon U.S. is a bellwether or leading indicator, the chip design verification market and, more specifically, hardware emulation will be healthy for years to come. DVCon 2018, which took place earlier this year, was the place to be to discover the latest trends in chip design verification, much like it normally is. The who’s … Read more

Hardware Emulation Answers AI/ML Verification Needs

With AI/ML chip designs containing between 5 billion and 10 billion gates, design verification using hardware emulation is the answer, although not all hardware emulators are the same Artificial intelligence/machine learning (AI/ML) is the ultimate hot topic of 2019, taking hold of chip design and the semiconductor industry’s imagination and not letting go — for … Read more