Hardware-assisted verification (HAV) solutions are the must-have verification tools today as complexity, functionality, and performance requirements grow. They are also mandatory to ensure that design power consumption meets the power budget allocated.
This need was obvious at the 2022 Design Automation Conference (DAC), as chip design verification engineers relayed tales of challenges solved by employing HAV tools through presentations and anecdotal hallway conversations. Adoption is growing, and I estimate the HAV market is more than $1 billion in yearly revenue by the end of 2022.
Current HAV market segments
HAV solutions are well suited for any number of market segments. They are used to verify communications, computer, and consumer chip designs as a matter of course. Looking ahead, the transportation market –– specifically, automotive –– is adopting new methodologies that have a higher reliance on hardware-assisted tools, and AI applications are now ubiquitous across all industries.
For a close-up look at use cases for hardware-assisted verification, I’ll use Siemens EDA as an example. Each time I walked by its DAC booth, it had clusters of attendees mingling with the booth staff. I managed to pull a few product specialists aside and talked with the HAV group about some interesting applications that were presented at U2U, the Siemens EDA user group. Alibaba is using HAV tools for IoT chip design and AI chips powering a cloud platform. Qualcomm’s GPU designs benefit from HAV solutions for register-transfer–level power improvement. Intel employs an HAV platform for FPGA prototyping system-on-chip (SoC) designs, while Micram (now Keysight) is designing 5G chips for high-speed communication, as is Nokia.
Arm is an HAV user as well. In one application, Arm emulated an SoC in hybrid mode via a virtual platform for the visibility into the design that FPGA-based solutions lacked. Time-to-root-cause bugs and verification coverage were faster than FPGA-based systems. In another application, Arm used a power and fault app for memory built-in self-test verification on an SoC. Engineers concluded that the time-to-power-analysis results were reduced from days to minutes, test coverage analysis was accelerated, and 85,000 faults were not targeted by automatic test pattern generation.
Trends and opportunities for evolving HAV use cases
While many design and verification trends are not new, they seem to be getting more visibility, as design starts with complex specifications and escalating software content proliferate throughout leading market segments. They all share the need for greater tool capacity and faster execution speed. From all accounts, HAV solutions meet these requirements. It helps explain the strong market demand, especially in emerging applications.
Jay Vleeschhouwer, managing director at Griffin Securities, identified in a presentation increased investment by semiconductor companies in chip design and now software development. This may not be much of a surprise or emerging trend to those following the verification space. Co-verification of hardware and software can be done only by HAV solutions.
It’s always satisfying to attend DAC and listen to what attendees are saying. This year’s DAC proved again to be a place to identify trends and reinforce perceptions. My perception was confirmed that adoption of HAV solutions is growing, as are their use cases. It’s a great time to be a hardware-assisted verification provider.