Today’s SoC Design Verification and Validation Require Three Types of Hardware-Assisted Engines


Lauro Rizzatti offers Semiwiki readers a two-part series on why three kinds of hardware-assisted verification engines are now a must have for semiconductor designs continues today. His interview below with Juergen Jaeger, Prototyping Product Strategy Director in the Scalable Verification Solution division at Siemens EDA, addresses why different hardware platforms should be used in a verification and for which tasks.

In part one of the series, Lauro interviewed Vijay Chobisa, Product Marketing Director in the Scalable Verification Solution division at Siemens EDA, about why verification of 10+ billion-gate design requires a distinct architecture. That blog post can be found here.

LR: Siemens EDA acquired proFPGA, a popular FPGA prototyping system, and integrated it into the Veloce hardware-assisted verification platforms. What drove this acquisition and what has been the customer response?

JJ: Let me first address the question of what drove the acquisition.

For many years, FPGA designers created FPGA prototypes in-house. Lately though, the task has become challenging and expensive because of the complexity of the latest generation of FPGAs. In addition, because large ASIC designs require multiple FPGAs for their mapping, the design of FPGA prototypes evolved into a significant project, rather expensive and time-consuming, making off-the-shelf systems cost effective.

Common customers encouraged Siemens to partner with PRO DESIGN because of the synergies between the Veloce emulation platform and the proFPGA family. An OEM agreement was signed in 2017 and engineering work was done on both sides to integrate the Veloce Prototyping System software with proFPGA. With this implementation, we accelerated Veloce proFGPA’s deployment in Veloce customer installations.

It turned out that customer response has been very favorable to the acquisition. The Veloce proFPGA boards are of high quality, the system is scalable and flexible, and supports various AMD and Intel FPGAs. It is capable to fulfill many needs in the prototyping space. Today, under the umbrella of Siemens, benefitting from a global sales channel reaching a wide customer base, its adoption is expanding rapidly.

LR: With the addition of proFPGA to your Veloce Strato+ emulator and Veloce Primo FPGA enterprise prototype, now you propose three different, but complimentary platforms. Can you describe the role of each platform?

JJ: Let me start with what drives customer behavior to choose various hardware platforms. If you look at emulation, emulators can do many different things. You can perform hardware verification, software development, power analysis, DFT coverage, and more tasks. Customers primarily purchase an emulator to reduce the risk of re-spinning the chip itself (confirm that the hardware and baseline software perform as expected). Predominantly, emulators are used for RTL verification, namely, to get the hardware design clean. That means that emulators like our Veloce Strato/Strato+ systems need certain characteristics like very fast and reliable compile times, and superior debug capabilities, all mandatory for hardware verification. And then of course you can carry out many other tasks because you already own it. Those additional use modes increase the value of what you can do with it.

Over the last four to five years, software contents in chips and SoCs have grown dramatically. So did the complexity of SoC hardware with multicores, accelerators, and DSPs, as well as lots of interfaces that require drivers and firmware. As a result of that, embedded software teams have expanded rapidly, which consequently led to an escalating demand to run software workloads much earlier in the project cycle.

Emulators can certainly accomplish that, but an emulator is also a relatively expensive platform and again the primary reason for buying it is to verify the RTL code. This opened the door to the FPGA prototyping platform. Compared to an emulator, an FPGA prototyping platform delivers higher performance, let’s say, five times faster run-time and lower cost that help to proliferate its deployment across several software engineering teams. That’s a second platform you need here, which is covered by our Veloce Primo.

Today, SoCs include lots of different interfaces depending on what the chip does. Popular ones, of course, include PCIe, USB, MIPI, and many others. All these interfaces must also be verified in the context of the basic functionality of the interface. They also must verify the software that is run on it to exercise and utilize those interfaces in the correct way to ensure that hardware and software work together. That is where a platform like Veloce proFPGA comes into play because with Veloce proFPGA you can include the interface and run it at speed connected –– for example, a real PCIe interface connected to a graphics card.

That is why we offer three platforms. Hardware emulation is the perfect platform for full, chip and SoC verification. Enterprise prototyping targets embedded software validation as well as system-level validation. For these tasks, the prototyping system needs certain characteristics such as, fast transition from emulation, reliable compile, sufficient debug, and higher performance than emulation. And then at at-time speed testing of interfaces with proFPGA.

Trying to merge all of that into one tool may be possible, but then you end up with one tool that can somewhat do everything but does not do anything right or excel in any task that customers really need.

LR: Your two competitors in this field offer two complimentary platforms, that is, emulators and FPGA prototypes. Why do you believe that three platforms are necessary?

JJ: In a nutshell, you want to have the optimal platform, the best solution for each phase in your project to reduce the risk of re-spins, get your software validated, keep the verification/validation cycle on schedule, and to deliver the end product on time and on budget to your customers.

In order to do that, I’m convinced that you need three platforms that are best-in-class for what they are intended to do. Emulation for hardware verification, power analysis, all of the tasks you run on it. Enterprise prototyping to bring up your software on the pre-silicon chip, comprising the full operating system, firmware and application software. Fast proFPGA prototyping for at-speed interface validation.

LR: To conclude, you have been working in the hardware-assisted verification domain for quite a while. What are some of the aspects of the job that continue to motivate and fascinate you most?

JJ: From childhood on, I was always fascinated by learning new things and building things. Now, if you think about what verification and especially hardware verification is, it puts you on a platform with the most advanced designs and systems in the industry. You are working with customers on leading-edge projects that will be launched, in some cases, years from now.

You are also dealing with some of the most technical challenges and costly challenges in the industry, which is verification of billion-gate designs executing very complex software workloads.

In my case, I enjoy being at the forefront of technology. It gives me the opportunity to learn new things, and that keeps me young.

LR: Thank you, Juergen.

JJ: You’re very welcome.