2015 DVCon India – The Jewel of the Crown

Source:  EDACafé Many PBS stations in the U.S. are promoting the rebroadcast of the 1984 series “The Jewel of the Crown.” A jewel in the crown was my sentiment about the recent DVCon India, one of several design and verification conferences organized by the industry standards organization Accellera Systems Initiative. DVCon India was held in … Read more

Performance in Hardware Emulators – Part II

An emulator’s performance — or its speed of execution — depends on the architecture of the emulation system and the type of deployment. Source: EETimes In my previous post, Performance in Hardware Emulators, I discussed the dependency of performance on the type of deployment. In this column, I will examine the relationship between emulation system architectures … Read more

How To Speed Up Networking Design Verification

One of the consequences of the IoT is an increase in the number of Ethernet ports. Source: Semiconductor Engineering The enormous growth of the Internet of things (IoT) has an enormous impact on network providers. After all, without the underlying network infrastructure, there would be no IoT. One consequence has been a significant increase in the … Read more

Skeet Shooting and Design Debug

Source: Tech Design Forum Historically, the first method to be deployed and to this day most popular method for using a hardware emulator is the in-circuit-emulation (ICE) mode. In this mode, the emulator is plugged into a socket on the physical target system in place of a yet-to-be-built chip to support exercising and debugging the design-under-test … Read more

Performance in Hardware Emulators – Part I

Emulation performance — or its speed of execution — depends on the architecture of the emulation system and the type of deployment. Source: EETimes Continuing my discourse on various aspects of hardware emulators (see also DAC Trip Report: Expanding EDA’s Charter & Topical Hardware Emulation), I now wish to discuss one of the most important aspects of … Read more

Emulation Fast-Tracks Networking Products to Market

An Ethernet VirtuaLAB provides a software-controlled environment for generating, transmitting, and analyzing Ethernet packets to test Ethernet SoCs mapped inside an emulation platform. Source: Electronic Design With the spectacular surge in demand for connectivity, the Internet has become a major communications highway for billions of users. According to “Internet Live Stats,” the Internet reached out to … Read more

The Golden Age of Emulation

Source: ChipDesign In the not too distant past –– say 20- to 30 years ago –– hardware emulators were huge and hulking, with a massive amount of cables and wires trailing all over the floor. I still remember my first visit  to AMD in Austin, Texas, back in 1995, when I saw Quickturn’s Enterprise Emulation … Read more

Power Analysis has a New Look

Source: Verification Horizons Power continues to be a primary concern for handheld and smart devices, with their high resolution screens that require long battery life, as well as for wall-plugged equipment in datacenters and network configurations, for which the cost of operation is a key market factor. While FinFET process technology reduces static leakage, dynamic power … Read more

The Old Two-Step Just Doesn’t Have That Swing

What’s needed for power analysis in million-gate SoCs. Source:  Semiconductor Engineering Power analysis has quickly become equally as important as functional verification for today’s power-hungry SoCs. Yet, until now, it was not possible to fully analyze dynamic power in very large SoCs running embedded software. That day has finally arrived with new emulation platform software … Read more