CEO Interview: Khaled Maalej, VSORA Founder and CEO

Khaled Maalej is founder and CEO of VSORA, a provider of high-performance silicon chips for GenerativeAI and L4/L5 autonomous driving (AD) applications based in France. Before founding VSORA in 2015, Maalej was CTO at DiBcom, a fabless semiconductor company that designed chipsets for low-power mobile TV and radio reception acquired by Parrot. He graduated from Ecole Polytechnique & Ecole Nationale Superieure des Telecommunications in Paris.

Tell us about your company.
Drawing on more than a decade of expertise in chip architecture initially refined targeting DSP applications in radio communications, VSORA envisioned a processor architecture aimed at delivering exceptional performance with superior efficiency. In today’s computing landscape, while leading processors boast significant computing power, they falter in efficiency, particularly as software workload expands.

We were successful and caught the attention of The Linley Group (now TechInsights). In 2021, our AD1028 architecture clinched the prestigious 2020 Linley Group Analysts’ Choice Awards for Best IP processor.

Over the past two years, we fine-tuned our foundational architecture and created an on-the-fly scalable and reprogrammable computing core. It can perform AI and general-purpose computing or other functionality to target two pivotal and demanding domains through two distinct families of devices. The Tyr family comprises three scalable devices designed to execute the perception and motion planning tasks in L4 (highly automated) and L5 (fully automated) autonomous driving (AD) controllers. The Jotunn family features two scalable devices tailored to meet the demanding generative AI (GenAI) applications.

Save for actual silicon, we have simulated our processors at different abstraction levels all the way into FPGAs via Amazon AWS. Across the board, the results showcase unparalleled processing power (6 petaflops), computing efficiency (50% on GPT-4), minimal latency, restricted energy consumption (40 watt per petaflops), and small silicon footprint.

What problems are you solving?
About a decade ago, Marc Andreessen authored an article titled “Why software is eating the world.” Today, we might assert that the software is eating the hardware. The relentless pursuit of higher processing power by applications such as autonomous driving and generative AI remain unquenchable. While CPUs, GPUs, FPGAs strive to bridge the gap, they fall short of meeting the demands of cutting-edge applications.

What’s needed is a revolutionary architecture capable of delivering multiple petaflops with efficiencies surpassing 50%, while consuming less than 50 watts per petaflops, boasting minimal latencies, and selling at competitive pricing.

That is the challenge that VSORA aims to tackle head-on.

What was the most exciting high point of 2023 for your company?
2023 marked a turning point for VSORA as we achieved a significant milestone. Out of 648 applicants, we were chosen as one of 47 startups to benefit from the 2023 European Innovation Council (EIC) Accelerator Program. This annual event represents a beacon of innovation within the entrepreneurial ecosystem. The selection validates our vision and rewards our efforts with a combination of grants and equity investments to fuel our growth.

What was the biggest challenge your company faced in 2023?
Our goal is to tape our architecture onto silicon. This endeavor requires a substantial investment of up to $50M. In 2023, apart from securing the EIC grant and investment equity, we worked with several VC firms, investment funds, and banks and are optimistic that our efforts will yield fruitful results in 2024.

What do you think the biggest growth area for 2024 will be, and why?
The exponential success of Nvidia underscores the unstoppable ascent of GenAI. Nvidia dominates the learning phase of AI applications executed in large data centers around the world. However, GPUs prove inefficient for edge inference. To mitigate this inefficiency when running ChatGPT-4, extensive arrays of GPUs must be deployed, resulting in exorbitant energy consumption and substantial latency issues. This setup not only entails significant acquisition costs but also proves expensive to maintain and operate.

Another promising area for growth lies in AD. Over the past three to four years, the push to implement level 4 and 5 AD controllers has somewhat lost intensity, primarily due to the absence of viable solutions in the market. We anticipate a resurgence of momentum in 2024, fueled by a better understanding of the requisite specifications and the emergence of advanced digital processing capabilities.

How does your company address this growth?
In advanced algorithms like transformers, relying solely on pure AI instructions is no longer adequate. Consider the PointPillars algorithm, which incorporates pure AI functions and DSP functions within its code. Or in the case of Mask R-CNN that mixes general processor instructions and pure AI functions. At VSORA, we integrate MAC and ALU functions within our compute cores, and transfer data with a high-bandwidth, on-chip memory system through a proprietary scheme engineered to overcome the challenges posed by “memory wall.”

Moreover, we enable layer-by-layer specific any-bit floating point quantization and support sparsity both in weights and data on-the-fly. The approach frees developers from dealing with code details by automatically determining the optimal configuration for each task.

The tangible results of these innovations are evidenced in the specifications for Jotunn.

What new features/technology are you working on?
We believe our hardware architecture is robust and performing. We are now focusing on enhancing our software capabilities.

Our newly developed software offers a distinct advantage over competitors. Unlike solutions based on CUDA-like, low-level programming languages where developers must specify loops for matrix multiplication, VSORA operates at the algorithmic level (Matlab-like, Tensorflow-like, C++) avoiding the need to engage in low-level programming and optimization that may demand significant vendor attention. The VSORA software environment shields users from dealing with these lower-level intricacies, enabling them to focus solely on the algorithms.

As for algorithms validation, the VSORA development environment encompasses a suite of simulation tools to verify code at high-level, transaction-level-modeling (TLM) and register transfer level (RTL) model, as well as on AWS FPGAs.

How do customers engage with your company?
First contact might be through our website (VSORA.COM), and I encourage readers to visit it. We can always be reached via email at