Hardware-Assisted Verification Overtakes HDL Simulation
LinkedIn Jean-Marie Brunet, MKTG Director, Mentor, a Siemens Business, jm_brunet@mentor.comLauro Rizzatti, MKTG Consultant, lauro@rizzatti.com Sept 4, 2020 Over the past two years, a remarkable, though virtually unnoticed financial event occurred in the electronic design automation (EDA) space: revenue from hardware-assisted verification tools, basically hardware emulation and FPGA-based prototyping, surpassed those from hardware-design-language (HDL) or register-transfer-language (RTL) simulation. … Read more