Beyond the Memory Wall: Unleashing Bandwidth and Crushing Latency

Key Takeaways VSORA AI Processor Raises $46 Million to Fast-Track Silicon Development We stand on the cusp of an era defined by ubiquitous intelligence—a stone’s throw from a tidal wave of AI-powered products underpinned by next-generation silicon. Realizing that future demands nothing less than a fundamental rethink of how we design semiconductors and architect computers. … Read more

SNUG 2025: A Watershed Moment for EDA – Part 2

Key Takeaways At this year’s SNUG (Synopsys Users Group) conference, Richard Ho, Head of Hardware, OpenAI, delivered the second keynote, titled “Scaling Compute for the Age of Intelligence.” In his presentation, Richard guided the audience through the transformative trends and implications of the intelligence era now unfolding before our eyes. Recapping the current state of AI … Read more

VSORA Raises $46 Million to Bring World’s Most Powerful AI Inference Chip to Market

VSORA, a French innovator and the only European provider of ultra-high-performance artificial intelligence (AI) inference chips, today announced that it has successfully raised $46 million in a new fundraising round. The investment was led by Otium and a French family office with additional participation from Omnes Capital, Adélie Capital and co-financing from the European Innovation … Read more

SNUG 2025: A Watershed Moment for EDA – Part 1

Key Takeaways Hot on the heels of DVConUS 2025, the 35th annual Synopsys User Group (SNUG) Conference made its mark as a defining moment in the evolution of Synopsys—and the broader electronic design automation (EDA) industry. This year’s milestone event not only underscored Synopsys’ continued innovation but also affirmed the vision and direction of its … Read more

The Rise of LLM Inference at the Edge: Innovations Shaping the Future

Over the past decade or so, the evolution of edge AI inference has mirrored advancements in hardware, software, and AI model optimization. The origins of AI inference at the edge can be traced back to the early days of embedded computing, when limited processing power made AI development impractical. Before AI models became widespread, edge … Read more

DVCon 2025: AI and the Future of Verification Take Center Stage

Key Takeaways The 2025 Design and Verification Conference (DVCon) was a four-day event packed with insightful discussions, cutting-edge technology showcases, and thought-provoking debates. The conference agenda included a rich mix of tutorial sessions, a keynote presentation, a panel discussion, and an exhibit hall with Electronic Design Automation (EDA) vendors demonstrating their latest tools and engaging … Read more

The Double-Edged Sword of AI Processors: Batch Sizes, Token Rates, and the Hardware Hurdles in Large Language Model Processing

Key Takeaways Unlike traditional software programming, AI software modeling represents a transformative paradigm shift, reshaping methodologies, redefining execution processes, and driving significant advancements in AI processors requirements. Software Programming versus AI Modeling: A Fundamental Paradigm Shift Traditional Software ProgrammingTraditional software programming is built around crafting explicit instructions (code) to accomplish specific tasks. The programmer establishes … Read more

AI Inferencing in Data Centers: Breaking the Efficiency-Cost Tradeoff

Training and inferencing comprise two crucial aspects of AI processing in datacenters. Learn the differences between the two, and the cost-efficiency issues involved. The execution of artificial intelligence (AI) workloads in datacenters (Figure 1) involves two crucial processes: training and inference. At first glance, these processes appear similar—both involve reading data, processing it, and generating … Read more

A Deep Dive into SoC Performance Analysis: Optimizing SoC Design Performance Via Hardware-Assisted Verification Platforms

Part 2 of 2 – Performance Validation Across Hardware Blocks and Firmware in SoC Designs Part 2 explores the performance validation process across hardware blocks and firmware in System-on-Chip (SoC) designs, emphasizing the critical role of Hardware-Assisted Verification (HAV) platforms. It outlines the validation workflow driven by real-world applications, and best practices for leveraging HAV … Read more

A closer look at LLM’s hyper growth and AI parameter explosion

The rapid evolution of artificial intelligence (AI) has been marked by the rise of large language models (LLMs) with ever-growing numbers of parameters. From early iterations with millions of parameters to today’s tech giants boasting hundreds of billions or even trillions, the sheer scale of these models is staggering. Table 1 outlines the number of parameters … Read more