Looking back on the past 12 months, I marvel at how far hardware emulation has come over 20 years, and especially in 2017.
(Source: Brigitte Tohm on Unsplash.com)
At DVCon India in September, three emulation users who participated to a panel I moderated agreed about the benefits of emulation, and clearly stated they would not be able to do their job without it. More to the point, a verification engineer told me recently he uses hardware emulation for everything. Remarkably, hardware emulation made the Gary Smith EDA “What to see at DAC” list. That’s a different tune from the early days of hardware emulation when the machines were cranky and expensive, it took an army to set one up, and the rallying cry was: “Time to emulation.”
The types of advances made to hardware emulation technology in 2017 alone substantially increased its design capacity and performance, while decreasing power consumption and improving versatility and return on investment (ROI). It’s easy to see why hardware emulation sits at the foundation of many chip design verification strategies, making the “shift-left” verification objective a reality. Just consider the verification of complex SoC designs for networking applications that easily exceed one-billion gates.
Advances in emulation technology and its integration into the design tool flow allowed for a new paradigm to perform hardware/software verification and validation ahead of first silicon. Hardware designers and software developers can use emulation harmoniously, sharing the same system and design representations to debug hardware and software interactions.
Data center-friendly emulation platforms are readily available now. Expanded multi-user capabilities and remote 24/7 access from anywhere in the world, made easy via the virtualization of the test environment, substantially multiplied its ROI — a big advantage for global engineering groups.
Emulation introduced “apps” in 2016 and new apps were announced in 2017. Among others, design-for-test (DFT), low-power verification and Deterministic In-Circuit Emulation (D-ICE) applications became available in 2017. The power “app,” for example, verifies that multiple power domains defined through the unified power format (UPF) standard operate as projected. It can track average power consumption to determine the lifespan of the battery, trace time-based power consumption, and pinpoint power peaks that may overload and shut off the battery. The DFT app quickly verifies large sets of test vectors on a gate-level netlist, which is no longer possible with simulation. D-ICE removes the inherent randomness of the physical target system, a main drawback of ICE, and accelerates the time to find and fix bugs.
Use models are growing exponentially as more and more engineers in a variety of market segments experience the benefits of hardware emulation. They are using it in new and different ways, making it hard not to appreciate hardware emulation’s changing fortunes. Hardware emulation thrived in 2017 — a “marvel-apps” year — and I expect much of the same in 2018.