Dr. Lauro RizzattiMarketing Expert and Consultant

Dr. Lauro Rizzatti
Areas of expertise
  • 30-year career in the Electronic Design Automation (EDA) and Automatic Test Equipment (ATE) industries
  • Doctorate in Electronic Engineering
  • Investor and member of the Oregon Angel Fund (OAF)
  • Product marketing
  • Technical marketing
  • Engineering

Dr. Lauro Rizzatti is a true global citizen whose 30-year career in the Electronic Design Automation (EDA) and Automatic Test Equipment (ATE) industries has spanned the globe enabling him to reside in places like the United States, Europe, the Middle East, Japan, and the Pacific Rim. While cultivating his affinity for living abroad, he held management positions of significant responsibility. His expertise in product marketing, technical marketing and engineering made him an attractive candidate to the biggest names in EDA and ATE.

Currently a marketing expert and consultant, his impressive resume includes leadership positions at EVE (acquired by Synopsys), Get2Chip (acquired by Cadence), Synopsys, Mentor Graphics, Teradyne, Alcatel and Italtel. Dr. Rizzatti has published numerous articles and technical papers in industry publications and has presented at various international technical conferences around the globe. He holds a doctorate in Electronic Engineering from the Universita` degli Studi di Trieste in Italy and presently divides his time between the U.S. and Europe.

Dr. Rizzatti is also an active investor and member of the Oregon Angel Fund (OAF). He seeks to connect with passionate entrepreneurs who have innovative ideas and are serious about seeing them realized. If this sounds like you, contact him.

Publications

  • Hardware Emulation Plus FPGA Prototyping: A Perfect Fit for Today’s SoC Verification

    A quick glance in today’s design verification toolbox reveals a variety of point tools supporting the latest system-on-chip (SoC) design development. Combined and reinforced by effective verification methodologies, these tools trace even the most hard-to-find bug, whether in software or in the target hardware.

    January 27, 2021
  • Emulation-Centric Power Analysis of SoC Designs

    Due to the switch from planar CMOS to FinFET technology, accurate pre-silicon power estimation is more important than ever for system-on-chip designs.

    January 6, 2021
  • VSORA Pushes the PetaFLOPS for Autonomous Driving

    Autonomous driving is a wildly challenging problem. Of all the headline-grabbing technologies in development today, replacing the human driver in a car probably takes the most computing power, although you wouldn’t guess that from the obvious lack of computing power demonstrated by many of our fellow human drivers on the road.

    December 1, 2020

contact details

1477 Yale street, California, CA

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