Top 10 Reasons Why Hardware Emulation is a Must Have Tool to Chip DesignLauro Rizzatti implores designers to follow the crowd, defying moms everywhere
- September 3, 2014
- Posted by: Lauro Rizzatti
- Category: 2014
When you were a kid, your mother may have admonished you when you wanted to do something everyone else was doing by saying: “Just because someone else does something, doesn’t mean you should.”
Well, I hate to disagree with mom, but project teams worldwide are adopting hardware emulation on the recommendation and success of others. If your team isn’t one of them, you may want to ignore your mom’s advice and read through the top 10 reasons why it’s fast becoming the verification tool of choice.
- Hardware emulation’s speed of execution can’t be beaten: Emulation’s speed of execution can be up to six orders of magnitude faster than that of a traditional hardware description language (HDL) software simulator, dramatically shortening the design debug process and allowing for verification of near real-life scenarios.
- Hardware emulation can’t be defeated by design capacity: No matter what the size of the design under test (DUT), hardware emulation can handle it, even if it reaches into the billions of ASIC gates.
- Hardware emulation is the only game in town for hardware/software integration: This may be the main reason for hardware emulation’s popularity. Its use is growing exponentially because of increasingly complex designs and more embedded software in systems on chip (SoC) devices.
- Hardware emulation can find all design bugs: Hardware emulation is the best bug hunter around, able to chase down bugs in an SoC’s hardware and in the embedded software, regardless of design size, type, or structure.
- Hardware emulation reduces or even eliminates respins:With the escalating cost of designing chips at very low technology nodes, such as 28nm or lower, hardware emulation isn’t as big an expense as the cost of a new set of masks.
- Hardware emulation applies to all chip projects: All semiconductor market segments can benefit from hardware emulation as long as there is a digital representation of the design.
- Hardware emulation is a shared resource: Emulation platforms can be accessed remotely in transaction-based emulation mode or in standalone emulation mode, thereby making them ideal for design datacenters serving multiple teams, 24/7, anywhere in the world.
- Hardware emulation is replacing FPGA prototyping tools: Once a design reaches a certain size — say 100-million gates or larger — it is emulation or nothing else. Unlike FPGA-based prototyping systems, hardware emulation offers full design visibility without compilation and supports multiple design iterations per day.
- Hardware emulation has never been easier to use: Gone are the days when emulators were hard to use, required a full-time specialist on-site, and came with fire extinguishers because of their tendency to overheat. Furthermore, software support was rather rudimentary and mainly limited to the compilation of the register transfer level (RTL) design into the box. Hardware emulation is now easy to use, flexible, versatile, scalable, multi-user, and multi-purpose.
- Hardware emulation accelerates time to market: Combine all the other nine reasons why hardware emulation is a must-have tool, and the result is faster time to market. It is a fact that hardware emulation usage is growing. Project teams are investing in emulation, which has become a mainstream tool.
Mothers are almost always right about almost everything. (Remember the old joke: Rule #1: Mother is always right. Rule 2: If mother is wrong, Rule 1 applies.) They are not right, though, when it comes to hardware emulation. Following the project team crowd is the only way to manage today’s SoC design challenges … just don’t tell your mother.
Lauro Rizzatti is a verification consultant. He was formerly general manager of EVE-USA and its vice president of marketing before Synopsys’ acquisition of EVE. Previously, Lauro held positions in management, product marketing, technical marketing, and engineering. He can be reached at firstname.lastname@example.org.