Source: Electronic Design Misconceptions and outright falsehoods can skew the perception of hardware emulation. These include: 1. Hardware emulators are verification tools relegated to the backroom and used only on the most complex designs that need more rigorous debugging. This was true in the early days of their existence in the late 1980s and early 1990s until … Read more
Source: EDACafé One day recently, I was considering the varied use models for hardware emulation. It brought back a long-forgotten memory of an evening bowling in New England, where I lived for several years in the ‘80s. New England has a quaint, little-known (outside of the region) type of bowling called Candlepin. While the play is … Read more
Risk aversion, which comes from the uncertainty associated with committing a design to silicon, is the name of the game. Source: EETimes December is normally a month in which we take a moment to look back over the preceeding year. With this in mind, I skimmed through the blog posts I’ve written for EE Times in … Read more
Source: EDACafé The 2015 DVCon/Europe was held in Munich at the Holliday Inns City Center Hotel November 11-12. November in Munich brought back long ago memories of a snow covered city with freezing temperatures when I lived there in the 80s. Not this November. Warm, sunny days crowned the conference and invited attendees to take a … Read more
Source: EDACafé The 2015 DVCon/Europe was held in Munich at the Holliday Inns City Center Hotel November 11-12. November in Munich brought back long ago memories of a snow covered city with freezing temperatures when I lived there in the 80s. Not this November. Warm, sunny days crowned the conference and invited attendees to take a … Read more
Source: Verification Horizon THE LAST DECADE At the beginning of the third decade, circa 2005, system and chip engineers were developing evermore complex designs that mixed many interconnected blocks, embedded multicore processors, digital signal processors (DSPs) and a plethora of peripherals, supported by large memories. The combination of all of these components gave real meaning … Read more
Source: EDACafé Graphics chips, the longtime champs of massive designs, have lost their title to the new heavyweight, Ethernet switch and router chips, which weigh in at half a billion or more ASIC-equivalent gates. The complexity of the networking chip stems from a set of unique characteristics such as large number of ports, expanded throughput, … Read more
Project teams designing complex switches and routers have turned to hardware emulation as the foundation for their verification strategy to battle network congestion and outages. Source: EETimes Project teams designing complex switches and routers have turned to hardware emulation as the foundation for their verification strategy to battle network congestion and outages. We consumers are … Read more
By preserving capacity without sacrificing coverage, verification engineering teams get comprehensive functional verification with minimal incremental effort and without a hit on emulation capacity. Source: Electronic Design The huge undertaking of verifying a system-on-chip (SoC) design has challenged engineers for more than 20 years –– the amount of time spent on it hasn’t varied much … Read more
Source: EDACafé With due differences in subject matter – classic opera versus chip design verification – and, in a judgement call, a trivial farce versus expensive and hard to use, I see a similarity with what’s happening with hardware emulation. First devised in the middle of the 1980s, driven by the progress in field programmable … Read more